High Performance 32-bit RISC CPU
32-bit RISC CPU running at up to 120MIPS
Fast 96KB on-chip SRAM provides up to 800MB bandwidth at 100MHz
16KB Mask ROM for system booting
16 vectored interrupt controller. Two-level
programmable priority
Debug interface connects to GDB via JTAG
Internal 32-bit ticker-tick timer
Support JPEG & Motion JPEG Decode
External Memory Interface
16-bit SDRAM interface
Support auto-refresh and self-refresh in low power mode
8/16/32/64/128 bytes burst transfer
General Purpose DMA controller (GPDMA)
7 independent DMA channels for memory to peripherals,
peripherals to memory and memory to memory transfer
8/16/32-bit transactionInternal 64-bit FIFO per channelChannel 0: linear addressingChannel 1 – 4: 2D buffer addressingQoS control for channel 1 – 4Round Robin algorithm for channel arbitrationAuto configuration reload
LCD Controller
Support Thin Film Transistor (TFT) LCDProgrammable display resolution up to 1024x76824-bit digital or analog true colour displayBuilt-in palettized OSDProgrammable frames, lines and pixel clock timing for different panels
Support RGB, YUV 411 and YUV 422 formatDedicate DMA to SDRAMSupport external clock in as reference clock
JPEG Codec/ Motion JPEG& DSP coprocessor
Baseline JPEG decoding with automatic reset interval handling
Decode a macro block in 300 cycles typically. (640x480 images
at 24 FPS running at 100MHz)
Support DC only decoding for fast previewing
DSP coprocessor for fast 8/16-bit arithmetic
50M MAC at 100MHz specified for anti-aliasing,
smoothing, sharpening
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Serial Interface
High-speed full-duplex UART with baud rate generator
SPI with double-buffer. Operates up to 24Mb/s
GPSI for interfacing RF module, Ethernet PHY and for inter-chip communication
Dual channel 32-bit IIS for audio codec
Full-speed USB 2.0 OTG controller with 512 bytes FIFO
Most serial interfaces except UART can work with GPDMA
Other Peripherals
Video DAC
112 GPIO pins with configurable pull-up resistors.
Push-pull and open-drain mode. 8mA driving ability
SD card interface (host and device) for SDHC
specification 2.0
ECC engine for NAND Flash control
Two 16-bit Capture/Compare/Reload timers
Two 16-bit PWM channels with modulator
Real-time wake up for software clock implementation.
Watchdog Timer. Clocked from with on-chip RC oscillator
or RTC oscillator
8 channels 10-bit ADC
4-12MHz Crystal Oscillator
32,768 Hz Real-time Crystal Oscillator
32 Khz RC oscillator
Phase lock loop for maximum 200 MHz clock generation
Power-on reset
Low-voltage detector
On-chip regulator for 3.3V to 1.8V conversion
Development and Debugging Support
GCC compiler toolset
On-line debugging through IEEE 1149.1 JTAG protocol
and GDB
Packages
128-pin LQFP
144-pin LQFP
Application
Boombox
Car audio
Advertising Machine
Wireless Video Transfer
Digital Photo Frame (large LCD)
Baby Monitor
SIP Web-Phone
Portable MP4 |
